Tile Loading Research and Solution

Summary

This step investigates why games clear VRAM (write zeros) but don't load tiles afterwards, checking whether the problem is related to LCD behavior or a crash. Detailed monitors have been implemented to track VRAM accesses, check LCD timing during initialization, and detect when games try to load tiles.

The key findings are: (1) The games clear VRAM by writing zeros (PC:0x36E3 in pkmn.gb), (2) The LCD activates with empty VRAM, (3) The games DO load tiles after activating the LCD (pkmn.gb loads tiles in PC:0x618D, tetris.gb in PC:0x02F9), confirming that the problem is not a crash but a timing problem: the tiles are charge after the LCD is activated.

The current solution (test tiles when VRAM is empty) is valid, but we now know that games eventually load their own tiles, so the workaround will work until the real tiles load.

Hardware Concept

LCD behavior on Game Boy

LCD Off (LCDC bit 7 = 0): PPU stops completely, LY stays at 0, and the game can freely access VRAM without timing restrictions. Many games use this to load tiles and tilemap during initialization.

LCD On (LCDC bit 7 = 1): The PPU is active and rendering. Access to VRAM is restricted during certain PPU modes (Mode 3 - Pixel Transfer), and the game must synchronize writes to VRAM with PPU modes.

Fountain: Pan Docs - "LCD Control Register (LCDC)", "LCD Timing", "VRAM Access"

Tiles Loading

Tiles are loaded into VRAM (0x8000-0x97FF) in 16-byte blocks. Each tile occupies 16 bytes (8 lines × 2 bytes per line). The tilemap (0x9800-0x9BFF or 0x9C00-0x9FFF) contains tile IDs that point to tiles in VRAM. If the tiles are not loaded, the tilemap points to empty data and renders white.

Fountain: Pan Docs - "Tile Data", "Tile Map"

Initialization Timing

Games usually follow this pattern:

1. Turn off LCD
2. Clear VRAM (write zeros)
3. Load tiles into VRAM
4. Load tilemap
5. Configure palettes (BGP, OBP0, OBP1)
6. Activate LCD

If the LCD activates before completing these steps, the screen may be empty. However, some games activate the LCD and then load tiles, which works because VRAM is accessible during V-Blank and H-Blank.

Fountain: Pan Docs - "VRAM Access", "LCD Timing"

Implementation

Detailed monitors have been implemented to track VRAM accesses, check LCD timing during initialization, and detect when games try to load tiles.

VRAM Access Monitor

Added write logging to VRAM (0x8000-0x97FF) and tilemap (0x9800-0x9FFF) to understand the tile loading pattern. The logs capture the address, written value, and PC of the game.

// Detect when the game writes to VRAM
if (addr >= 0x8000 && addr<= 0x97FF) {
    static int vram_write_count = 0;
    if (vram_write_count < 100) {
        printf("[VRAM-WRITE] PC:0x%04X | Addr:0x%04X | Value:0x%02X\n", 
               debug_current_pc, addr, value);
        vram_write_count++;
    }
}

// Detectar escrituras en tilemap
if ((addr >= 0x9800 && addr<= 0x9BFF) || (addr >= 0x9C00 && addr<= 0x9FFF)) {
    static int tilemap_write_count = 0;
    if (tilemap_write_count < 50) {
        printf("[TILEMAP-WRITE] PC:0x%04X | Addr:0x%04X | TileID:0x%02X\n", 
               debug_current_pc, addr, value);
        tilemap_write_count++;
    }
}

VRAM Verification when Activating LCD

Added VRAM check when LCD turns on, to identify if there are valid tiles when LCD turns on. This helps identify if the problem is timing.

// Check VRAM when LCD wakes up
if (!lcd_was_on && lcd_is_on) {
    uint32_t vram_checksum = 0;
    int non_zero_bytes = 0;
    
    // Check first 1024 bytes of VRAM (64 tiles)
    for (uint16_t i = 0; i< 1024; i++) {
        uint8_t byte = mmu_->read(0x8000 + i);
        vram_checksum += byte;
        if (byte != 0x00) {
            non_zero_bytes++;
        }
    }
    
    printf("[PPU-LCD-ON-VRAM] LCD on | VRAM Checksum: 0x%08X | Non-zero bytes: %d/1024\n",
           vram_checksum, non_zero_bytes);
    
    if (vram_checksum == 0) {
        printf("[PPU-LCD-ON-VRAM] ⚠️ WARNING: VRAM is empty when LCD is activated!\n");
    }
}

Tile Load Detection

Added detection of when a full tile (16 bytes) is filled with valid data (not all zeros). This allows you to identify when games load tiles after clearing VRAM.

// Check if the tile we just wrote has valid data
if (addr >= 0x8000 && addr<= 0x97FF) {
    uint16_t tile_base = (addr / 16) * 16;
    uint8_t offset_in_tile = addr - tile_base;
    
    // Si estamos en el último byte del tile (offset 15), verificar si el tile completo tiene datos
    if (offset_in_tile == 15) {
        bool tile_has_data = false;
        for (int i = 0; i < 16; i++) {
            if (memory_[tile_base + i] != 0x00) {
                tile_has_data = true;
                break;
            }
        }
        
        if (tile_has_data) {
            printf("[TILE-LOADED] Tile en 0x%04X cargado con datos válidos (PC:0x%04X)\n", 
                   tile_base, debug_current_pc);
        }
    }
}

Modified components

• src/core/cpp/MMU.cpp: Functionwrite()- VRAM access monitor, tile loading detection
• src/core/cpp/PPU.cpp: Functionstep()- VRAM check when activating LCD

Design decisions

Logging limits: Logs were limited to the first N accesses to avoid context saturation, but enough data was captured to identify patterns.

Full tile detection: Checked when a full tile is completed (offset 15) instead of checking on each write, to reduce overhead and detect valid tiles more accurately.

Affected Files

• src/core/cpp/MMU.cpp- VRAM access monitor, tile loading detectionwrite()
• src/core/cpp/PPU.cpp- VRAM check when activating LCD onstep()

Tests and Verification

Tests were run with the 3 ROMs (pkmn.gb, tetris.gb, mario.gbc) for 2.5 minutes each, generating detailed logs for analysis.

Log Analysis - VRAM Accesses

The logs of[VRAM-WRITE]show that games write zeros to VRAM during initialization:

[VRAM-WRITE] PC:0x36E3 | Addr:0x8000 | Value:0x00
[VRAM-WRITE] PC:0x36E3 | Addr:0x8001 | Value:0x00
...
[VRAM-WRITE] PC:0x36E3 | Addr:0x8010 | Value:0x00

This confirms that the game clears VRAM by writing zeros to PC:0x36E3.

Log Analysis - Tilemap

The logs of[TILEMAP-WRITE]show that the game also clears the tilemap:

[TILEMAP-WRITE] PC:0x36E3 | Addr:0x9800 | TileID:0x00
[TILEMAP-WRITE] PC:0x36E3 | Addr:0x9801 | TileID:0x00
...

Log Analysis - LCD Activation

The logs of[PPU-LCD-ON-VRAM]show that when the LCD is activated, VRAM is empty:

[PPU-LCD-ON-VRAM] LCD On | VRAM Checksum: 0x00000000 | Non-zero bytes: 0/1024
[PPU-LCD-ON-VRAM] ⚠️ WARNING: VRAM is empty when LCD is activated!

This confirms that the LCD is activated before any tools are loaded.

Log Analysis - Tiles Loading

The logs of[TILE-LOADED]show that games DO load tiles after clearing VRAM:

pkmn.gb: [TILE-LOADED] Tile at 0x8820 loaded with valid data (PC:0x618D)
pkmn.gb: [TILE-LOADED] Tile at 0x8840 loaded with valid data (PC:0x618D)
...
tetris.gb: [TILE-LOADED] Tile at 0x8030 loaded with valid data (PC:0x02F9)
tetris.gb: [TILE-LOADED] Tile at 0x8020 loaded with valid data (PC:0x02F9)

Key finding: Games load tiles after activating the LCD, not before. This is normal because VRAM is accessible during V-Blank and H-Blank.

Tiles Loading Statistics

• pkmn.gb: 20 tiles loaded (PC:0x618D)
• tetris.gb: 3 tiles loaded (PC:0x02F9)
• mario.gbc: 0 tiles loaded (probably did not reach the loading phase during the 2.5 minutes)

C++ Compiled Module Validation

The C++ module was successfully recompiled without errors. All monitors function correctly and capture the information necessary for analysis.

Sources consulted

• Bread Docs:LCD Control Register (LCDC), LCD Timing, VRAM Access, Tile Data, Tile Map

Educational Integrity

Next Steps

• [ ] Check if actual tiles render correctly when loaded
• [ ] Check for performance issues when loading many tiles
• [ ] Continue developing other emulator components