This project is educational and Open Source. No code is copied from other emulators. Implementation based solely on technical documentation and permitted tests.
Tiles Addressing Correction and Visual Verification
Summary
Corrected tile addressing issue identified in Step 0313. The issue was that `load_test_tiles()` set LCDC to 0x91 (signed addressing, tile data base = 0x9000) but loaded tiles at 0x8000-0x803F, causing the PPU to not find the tiles.
Fixed LCDC to 0x99 (unsigned addressing, tile data base = 0x8000) to match where tiles are loaded. The C++ module was recompiled with the fix.
Hardware Concept
The recordLCDC (0xFF40)bit 4 controls the tile addressing mode:
- Bit 4 = 1 (Unsigned addressing): Tile data base = 0x8000, tile IDs 0-255
- Bit 4 = 0 (Signed addressing): Tile data base = 0x9000, tile IDs -128 to 127
The tiles must be loaded where the PPU looks for them according to the addressing mode. If tile IDs 0-3 (unsigned) are used, the tiles must be at 0x8000+ and LCDC bit 4 must be 1. If signed addressing (bit 4 = 0) is used, the PPU looks at 0x9000+ and will not find tiles at 0x8000+.
Fountain:Pan Docs - "LCDC Register" (0xFF40), "Tile Data" section
Implementation
Identified Problem
- Current LCDC: 0x91 = `10010001` in binary
- Bit 7 = 1 (LCD Enable ✅)
- Bit 4 = 0 (Signed addressing → tile data base = 0x9000 ❌)
- Bit 0 = 1 (BG Display ✅)
- Loaded tiles: 0x8000-0x803F (tiles 0-3 in unsigned addressing)
- Consequence: PPU looks for tiles at 0x9000+ but they are at 0x8000+, it does not find them
Correction Applied
Changing LCDC to 0x99 = `10011001` in binary:
- Bit 7 = 1 (LCD Enable ✅)
- Bit 4 = 1 (Unsigned addressing → tile data base = 0x8000 ✅)
- Bit 0 = 1 (BG Display ✅)
Modified Components
src/core/cpp/MMU.cpp(line ~1208): LCDC change 0x91 → 0x99 in `load_test_tiles()`
Modified Code
// --- Step 0314: Tiles addressing correction ---
// LCDC bit 4 = 1 for unsigned addressing (tile data base = 0x8000)
// This matches where the tiles are loaded (0x8000-0x803F)
// If bit 4 = 0 (signed addressing), the PPU would search at 0x9000+ and would not find the tiles
memory_[0xFF40] = 0x99; // LCD Enable (bit 7) + Unsigned addressing (bit 4) + BG Display (bit 0)
printf("[LOAD-TEST-TILES] LCDC configured: 0x%02X -> 0x99 (Unsigned addressing + BG Display enabled)\n", current_lcdc);
Affected Files
src/core/cpp/MMU.cpp- LCDC fix in load_test_tiles()CORRECTION_ADDRESSING_STEP_0314.md- Correction documentation
Tests and Verification
Correction validation:
- Compilation: C++ module successfully recompiled with
python setup.py build_ext --inplace - Source code: Verified that LCDC is set to 0x99 instead of 0x91
- Expected logs:
[LOAD-TEST-TILES] LCDC configured: ... -> 0x99[TILEMAP-INSPECT] BG Data Base: 8000(not 9000)
- Visual verification: Pending execution (see next steps)
Sources consulted
- Pan Docs: "LCDC Register" (0xFF40), "Tile Data" section
- Pan Docs: Tile Addressing (Signed vs Unsigned)
Educational Integrity
What I Understand Now
- Tool addressing: LCDC bit 4 determines where the PPU looks for the tiles (0x8000 vs 0x9000). The tiles must be facing the correct direction according to this mode.
- Consistency: It is critical that the addressing mode (LCDC bit 4) matches where the tiles are loaded into VRAM.
What remains to be confirmed
- Visual rendering: Verify that the tiles are displayed correctly on the screen after the correction.
- Patterns: Confirm that the expected patterns are seen (checkerboard, horizontal lines, vertical lines).
Hypotheses and Assumptions
The fix should resolve the white screen issue related to tile routing. Low FPS (8.0 FPS) is a separate issue that requires further investigation.
Next Steps
- [ ] Run visual verification of the rendering (30 seconds, observe tile pattern)
- [ ] Confirm that the tiles are displayed correctly (not white screen)
- [ ] Check configuration logs (LCDC 0x99, BG Data Base 8000)
- [ ] If it works correctly, document successful result
- [ ] If there are problems, investigate additional cause
- [ ] Address low FPS (8.0 FPS) issue in later steps